1. Field of the Invention
This invention relates to a static random access memory (SRAM) of the thin film transistor (TFT) load type, and more particularly to a static random accessory of the thin film transistor load type having an enhanced soft error resistance.
2. Description of the Related Art
A conventional static random access memory of the thin film transistor type includes a large number of memory cells normally having such a circuit configuration as shown in FIG. 1 and having such a layout as shown, for example, in FIG. 2 and such a sectional structure as shown, for example, in FIG. 3.
Referring to FIGS. 2 and 3, reference character 3P denotes the gate electrode of a p-channel MOS (metal oxide semiconductor) thin film transistor formed from a third polycrystalline silicon layer and serving as load means. Reference character 3PC denotes a contact portion of the gate electrode 3P with the gate electrode of an n-channel MOS transistor which serves as a driver transistor, and 4P denotes a fourth polycrystalline silicon layer, on which the thin film transistor having the gate electrode 3P is formed. In particular, the polycrystalline silicon layer 4P acts as an active layer of the thin film transistor, and reference character 4PC denotes a contact portion of the polycrystalline silicon layer 4P with the gate electrode 3P.
The static random access memory of the thin film transistor load type of the construction described above is advantageous in that, since a bulk n-channel MOS transistor is employed as a driver and a p-channel MOS field effect transistor (FET) is employed as load means so that a pair of invertors forming a flip-flop have a CMOS (complementary metal oxide semiconductor) invertor configuration, the current flowing through the cell can be restricted low. It is to be noted that various proposals have been made for such static random access memories, for example, by Japanese Utility Model Laid-Open Application No. 2-146849.
The conventional static random access memory of the thin film transistor load type having such a construction as described above, however, is disadvantageous in that the soft error resistance thereof cannot be made very high since the driving capacity of a thin film transistor serving as load means is low.
In particular, while RAMs have a problem that, if .alpha.-rays which are generated by decay of radioactive elements such as uranium contained very little in the material of wiring lines are introduced to a storage node of a cell which is in the state of a "high" potential, then an electron-positive hole pair is produced by a range of the .alpha.-rays and fluctuates the potential at the storage node to cause a soft error of reversal of the flip-flop, and static random access memories of the so-called full CMOS type rarely experience from this problem.
This is because, even if a storage node is urged to vary its potential by an electron-positive hole pair generated by .alpha.-rays, current is supplied to the storage node from a p-channel bulk MOS transistor serving as the load MOS transistor so that the storage node can maintain its state of a "high" potential. In other words, since a bulk MOS transistor has a sufficient driving capacity, an otherwise possible variation of the storage node by .alpha.-rays can be prevented.
However, with regard to static random access memories of the thin film transistor load type, a soft error is becoming a problem. In particular, in addition to the fact that thin film transistors are originally low in current driving capacity, they have a tendency that the size thereof is decreased in order to achieve higher integration of memories, which further decreases the current driving capacity of the thin film transistors. Accordingly, it is getting difficult to anticipate that a p-channel thin film transistor serving as load means can supply such current as to prevent the fluctuation of the potential at a storage node from being caused by .alpha.-rays.
Therefore, a soft error, which has conventionally been a problem only with dynamic RAMs, becomes a problem also with static random access memories.